| A2 |
C43 |
MGTHRXP3_133 |
Bank133 |
SLR1 |
- |
- |
| A3 |
C44 |
MGTHRXN3_133 |
Bank133 |
SLR1 |
- |
- |
| A6 |
E43 |
MGTHRXP2_133 |
Bank133 |
SLR1 |
- |
- |
| A7 |
E44 |
MGTHRXN2_133 |
Bank133 |
SLR1 |
- |
- |
| A10 |
G43 |
MGTHRXP1_133 |
Bank133 |
SLR1 |
- |
- |
| A11 |
G44 |
MGTHRXN1_133 |
Bank133 |
SLR1 |
- |
- |
| A14 |
J43 |
MGTHRXP0_133 |
Bank133 |
SLR1 |
- |
- |
| A15 |
J44 |
MGTHRXN0_133 |
Bank133 |
SLR1 |
- |
- |
| A18 |
R39 |
MGTREFCLK0P_133 |
Bank133 |
SLR1 |
- |
- |
| A19 |
R40 |
MGTREFCLK0N_133 |
Bank133 |
SLR1 |
- |
- |
| B4 |
B41 |
MGTHTXP3_133 |
Bank133 |
SLR1 |
- |
- |
| B5 |
B42 |
MGTHTXN3_133 |
Bank133 |
SLR1 |
- |
- |
| B8 |
D41 |
MGTHTXP2_133 |
Bank133 |
SLR1 |
- |
- |
| B9 |
D42 |
MGTHTXN2_133 |
Bank133 |
SLR1 |
- |
- |
| B12 |
F41 |
MGTHTXP1_133 |
Bank133 |
SLR1 |
- |
- |
| B13 |
F42 |
MGTHTXN1_133 |
Bank133 |
SLR1 |
- |
- |
| B16 |
H41 |
MGTHTXP0_133 |
Bank133 |
SLR1 |
- |
- |
| B17 |
H42 |
MGTHTXN0_133 |
Bank133 |
SLR1 |
- |
- |
| B20 |
N39 |
MGTREFCLK1P_133 |
Bank133 |
SLR1 |
- |
- |
| B21 |
N40 |
MGTREFCLK1N_133 |
Bank133 |
SLR1 |
- |
- |
| C2 |
L38 |
IO_L1P_T0L_N0_DBC_51 |
Bank51 |
SLR1 |
- |
- |
| C3 |
L39 |
IO_L1N_T0L_N1_DBC_51 |
Bank51 |
SLR1 |
JTAG_TDI_1V8 |
- |
| C6 |
J39 |
IO_L3P_T0L_N4_AD15P_51 |
Bank51 |
SLR1 |
JTAG_TDO_1V8 |
- |
| C7 |
H39 |
IO_L3N_T0L_N5_AD15N_51 |
Bank51 |
SLR1 |
- |
- |
| C10 |
H38 |
IO_L5P_T0U_N8_AD14P_51 |
Bank51 |
SLR1 |
- |
- |
| C11 |
G39 |
IO_L5N_T0U_N9_AD14N_51 |
Bank51 |
SLR1 |
- |
- |
| C14 |
R27 |
IO_L1P_T0L_N0_DBC_52 |
Bank52 |
SLR1 |
- |
- |
| C15 |
R28 |
IO_L1N_T0L_N1_DBC_52 |
Bank52 |
SLR1 |
- |
- |
| C18 |
P28 |
IO_L3P_T0L_N4_AD15P_52 |
Bank52 |
SLR1 |
- |
- |
| C19 |
P29 |
IO_L3N_T0L_N5_AD15N_52 |
Bank52 |
SLR1 |
- |
- |
| C22 |
N27 |
IO_L5P_T0U_N8_AD14P_52 |
Bank52 |
SLR1 |
UART0_RX_1V8 |
- |
| C23 |
N28 |
IO_L5N_T0U_N9_AD14N_52 |
Bank52 |
SLR1 |
UART0_TX_1V8 |
- |
| C26 |
T25 |
IO_L1P_T0L_N0_DBC_53 |
Bank53 |
SLR1 |
- |
- |
| C27 |
R25 |
IO_L1N_T0L_N1_DBC_53 |
Bank53 |
SLR1 |
- |
- |
| C29 |
T23 |
IO_L2P_T0L_N2_53 |
Bank53 |
SLR1 |
- |
- |
| C30 |
R23 |
IO_L2N_T0L_N3_53 |
Bank53 |
SLR1 |
- |
- |
| D1 |
H37 |
IO_L4P_T0U_N6_DBC_AD7P_51 |
Bank51 |
SLR1 |
- |
- |
| D2 |
G37 |
IO_L4N_T0U_N7_DBC_AD7N_51 |
Bank51 |
SLR1 |
- |
- |
| D4 |
K38 |
IO_L2P_T0L_N2_51 |
Bank51 |
SLR1 |
- |
- |
| D5 |
J38 |
IO_L2N_T0L_N3_51 |
Bank51 |
SLR1 |
- |
- |
| D7 |
F38 |
IO_L6P_T0U_N10_AD6P_51 |
Bank51 |
SLR1 |
- |
- |
| D8 |
F39 |
IO_L6N_T0U_N11_AD6N_51 |
Bank51 |
SLR1 |
- |
- |
| D12 |
N29 |
IO_L4P_T0U_N6_DBC_AD7P_52 |
Bank52 |
SLR1 |
- |
- |
| D13 |
M29 |
IO_L4N_T0U_N7_DBC_AD7N_52 |
Bank52 |
SLR1 |
- |
- |
| D16 |
M30 |
IO_L2P_T0L_N2_52 |
Bank52 |
SLR1 |
- |
- |
| D17 |
L30 |
IO_L2N_T0L_N3_52 |
Bank52 |
SLR1 |
- |
- |
| D19 |
L28 |
IO_L6P_T0U_N10_AD6P_52 |
Bank52 |
SLR1 |
- |
- |
| D20 |
L29 |
IO_L6N_T0U_N11_AD6N_52 |
Bank52 |
SLR1 |
- |
- |
| D24 |
P23 |
IO_L6P_T0U_N10_AD6P_53 |
Bank53 |
SLR1 |
- |
- |
| D25 |
N23 |
IO_L6N_T0U_N11_AD6N_53 |
Bank53 |
SLR1 |
- |
- |
| D27 |
P24 |
IO_L4P_T0U_N6_DBC_AD7P_53 |
Bank53 |
SLR1 |
- |
- |
| D28 |
N24 |
IO_L4N_T0U_N7_DBC_AD7N_53 |
Bank53 |
SLR1 |
- |
- |
| E2 |
K36 |
IO_L7P_T1L_N0_QBC_AD13P_51 |
Bank51 |
SLR1 |
- |
- |
| E3 |
J36 |
IO_L7N_T1L_N1_QBC_AD13N_51 |
Bank51 |
SLR1 |
- |
- |
| E5 |
J33 |
IO_L8P_T1L_N2_AD5P_51 |
Bank51 |
SLR1 |
- |
- |
| E6 |
H34 |
IO_L8N_T1L_N3_AD5N_51 |
Bank51 |
SLR1 |
JTAG_TMS_1V8 |
- |
| E8 |
F34 |
IO_L11P_T1U_N8_GC_51 |
Bank51 |
SLR1 |
JTAG_TCK_1V8 |
- |
| E9 |
F35 |
IO_L11N_T1U_N9_GC_51 |
Bank51 |
SLR1 |
- |
- |
| E11 |
K30 |
IO_L7P_T1L_N0_QBC_AD13P_52 |
Bank52 |
SLR1 |
- |
- |
| E12 |
J30 |
IO_L7N_T1L_N1_QBC_AD13N_52 |
Bank52 |
SLR1 |
- |
- |
| E14 |
K31 |
IO_L8P_T1L_N2_AD5P_52 |
Bank52 |
SLR1 |
- |
- |
| E15 |
J31 |
IO_L8N_T1L_N3_AD5N_52 |
Bank52 |
SLR1 |
- |
- |
| E17 |
J28 |
IO_L9P_T1L_N4_AD12P_52 |
Bank52 |
SLR1 |
- |
- |
| E18 |
J29 |
IO_L9N_T1L_N5_AD12N_52 |
Bank52 |
SLR1 |
- |
- |
| E20 |
R26 |
IO_L3P_T0L_N4_AD15P_53 |
Bank53 |
SLR1 |
- |
- |
| E21 |
P26 |
IO_L3N_T0L_N5_AD15N_53 |
Bank53 |
SLR1 |
- |
- |
| E23 |
P25 |
IO_L5P_T0U_N8_AD14P_53 |
Bank53 |
SLR1 |
- |
- |
| E24 |
N26 |
IO_L5N_T0U_N9_AD14N_53 |
Bank53 |
SLR1 |
- |
- |
| E26 |
M26 |
IO_L7P_T1L_N0_QBC_AD13P_53 |
Bank53 |
SLR1 |
- |
- |
| E27 |
M27 |
IO_L7N_T1L_N1_QBC_AD13N_53 |
Bank53 |
SLR1 |
- |
- |
| E29 |
M24 |
IO_L8P_T1L_N2_AD5P_53 |
Bank53 |
SLR1 |
- |
- |
| E30 |
L25 |
IO_L8N_T1L_N3_AD5N_53 |
Bank53 |
SLR1 |
- |
- |
| F1 |
H33 |
IO_L10P_T1U_N6_QBC_AD4P_51 |
Bank51 |
SLR1 |
PS_FLT0 |
GPIO46 |
| F2 |
G34 |
IO_L10N_T1U_N7_QBC_AD4N_51 |
Bank51 |
SLR1 |
PS_PWM2_B |
GPIO45 |
| F4 |
J35 |
IO_L9P_T1L_N4_AD12P_51 |
Bank51 |
SLR1 |
PS_PWM2_A |
GPIO44 |
| F5 |
H36 |
IO_L9N_T1L_N5_AD12N_51 |
Bank51 |
SLR1 |
PS_PWM1_B |
GPIO43 |
| F7 |
G35 |
IO_L12P_T1U_N10_GC_51 |
Bank51 |
SLR1 |
PS_PWM1_A |
GPIO42 |
| F8 |
G36 |
IO_L12N_T1U_N11_GC_51 |
Bank51 |
SLR1 |
PS_PWM0_B |
GPIO41 |
| F10 |
H32 |
IO_L10P_T1U_N6_QBC_AD4P_52 |
Bank52 |
SLR1 |
PS_PWM0_A |
GPIO40 |
| F11 |
G32 |
IO_L10N_T1U_N7_QBC_AD4N_52 |
Bank52 |
SLR1 |
GPIO_PP8 (PS_ENIM) |
GPIO39 |
| F13 |
H28 |
IO_L11P_T1U_N8_GC_52 |
Bank52 |
SLR1 |
PS_QEP0_I |
GPIO38 |
| F14 |
H29 |
IO_L11N_T1U_N9_GC_52 |
Bank52 |
SLR1 |
PS_QEP0_HA2 |
GPIO37 |
| F16 |
H31 |
IO_L12P_T1U_N10_GC_52 |
Bank52 |
SLR1 |
PS_QEP0_B |
GPIO36 |
| F17 |
G31 |
IO_L12N_T1U_N11_GC_52 |
Bank52 |
SLR1 |
PS_QEP0_HA1 |
GPIO35 |
| F19 |
L27 |
IO_L9P_T1L_N4_AD12P_53 |
Bank53 |
SLR1 |
PS_QEP0_A |
GPIO34 |
| F20 |
K27 |
IO_L9N_T1L_N5_AD12N_53 |
Bank53 |
SLR1 |
PS_QEP0_HA0 |
GPIO33 |
| F22 |
L23 |
IO_L10P_T1U_N6_QBC_AD4P_53 |
Bank53 |
SLR1 |
PS_CAP1_IO |
GPIO32 |
| F23 |
L24 |
IO_L10N_T1U_N7_QBC_AD4N_53 |
Bank53 |
SLR1 |
PS_CAP0_IO |
GPIO31 |
| F25 |
K25 |
IO_L11P_T1U_N8_GC_53 |
Bank53 |
SLR1 |
CAN2_RX_1V8 |
- |
| F26 |
J25 |
IO_L11N_T1U_N9_GC_53 |
Bank53 |
SLR1 |
CAN2_TX_1V8 |
- |
| F28 |
K26 |
IO_L12P_T1U_N10_GC_53 |
Bank53 |
SLR1 |
CAN1_RX_1V8 |
- |
| F29 |
J26 |
IO_L12N_T1U_N11_GC_53 |
Bank53 |
SLR1 |
CAN1_TX_1V8 |
- |
| G2 |
F37 |
IO_L13P_T2L_N0_GC_QBC_51 |
Bank51 |
SLR1 |
- |
- |
| G3 |
E38 |
IO_L13N_T2L_N1_GC_QBC_51 |
Bank51 |
SLR1 |
- |
- |
| G5 |
D36 |
IO_L17P_T2U_N8_AD10P_51 |
Bank51 |
SLR1 |
- |
- |
| G6 |
C36 |
IO_L17N_T2U_N9_AD10N_51 |
Bank51 |
SLR1 |
- |
- |
| G8 |
B37 |
IO_L18P_T2U_N10_AD2P_51 |
Bank51 |
SLR1 |
- |
- |
| G9 |
A37 |
IO_L18N_T2U_N11_AD2N_51 |
Bank51 |
SLR1 |
- |
- |
| G11 |
D38 |
IO_L16P_T2U_N6_QBC_AD3P_51 |
Bank51 |
SLR1 |
- |
- |
| G12 |
C38 |
IO_L16N_T2U_N7_QBC_AD3N_51 |
Bank51 |
SLR1 |
- |
- |
| G14 |
G30 |
IO_L13P_T2L_N0_GC_QBC_52 |
Bank52 |
SLR1 |
24M576_CLK |
- |
| G15 |
F30 |
IO_L13N_T2L_N1_GC_QBC_52 |
Bank52 |
SLR1 |
- |
- |
| G17 |
F28 |
IO_L18P_T2U_N10_AD2P_52 |
Bank52 |
SLR1 |
- |
- |
| G18 |
E28 |
IO_L18N_T2U_N11_AD2N_52 |
Bank52 |
SLR1 |
- |
- |
| G20 |
G29 |
IO_L14P_T2L_N2_GC_52 |
Bank52 |
SLR1 |
- |
- |
| G21 |
F29 |
IO_L14N_T2L_N3_GC_52 |
Bank52 |
SLR1 |
- |
- |
| G23 |
G25 |
IO_L13P_T2L_N0_GC_QBC_53 |
Bank53 |
SLR1 |
- |
- |
| G24 |
F25 |
IO_L13N_T2L_N1_GC_QBC_53 |
Bank53 |
SLR1 |
- |
- |
| G26 |
F27 |
IO_L15P_T2L_N4_AD11P_53 |
Bank53 |
SLR1 |
- |
- |
| G27 |
E27 |
IO_L15N_T2L_N5_AD11N_53 |
Bank53 |
SLR1 |
- |
- |
| G29 |
E25 |
IO_L17P_T2U_N8_AD10P_53 |
Bank53 |
SLR1 |
- |
- |
| G30 |
E26 |
IO_L17N_T2U_N9_AD10N_53 |
Bank53 |
SLR1 |
- |
- |
| H1 |
E36 |
IO_L14P_T2L_N2_GC_51 |
Bank51 |
SLR1 |
PWM0 |
GPIO11 |
| H2 |
E37 |
IO_L14N_T2L_N3_GC_51 |
Bank51 |
SLR1 |
PWM1 |
GPIO12 |
| H4 |
D39 |
IO_L15P_T2L_N4_AD11P_51 |
Bank51 |
SLR1 |
PWM2 |
GPIO13 |
| H5 |
C39 |
IO_L15N_T2L_N5_AD11N_51 |
Bank51 |
SLR1 |
PWM3 |
GPIO14 |
| H7 |
E35 |
IO_L19P_T3L_N0_DBC_AD9P_51 |
Bank51 |
SLR1 |
PWM4 |
GPIO15 |
| H8 |
D35 |
IO_L19N_T3L_N1_DBC_AD9N_51 |
Bank51 |
SLR1 |
PWM5 |
GPIO16 |
| H10 |
E30 |
IO_L16P_T2U_N6_QBC_AD3P_52 |
Bank52 |
SLR1 |
PWM6 |
GPIO17 |
| H11 |
D30 |
IO_L16N_T2U_N7_QBC_AD3N_52 |
Bank52 |
SLR1 |
PWM7 |
GPIO18 |
| H13 |
E31 |
IO_L17P_T2U_N8_AD10P_52 |
Bank52 |
SLR1 |
GPIO_PP9(GPIO-TEST) |
GPIO19 |
| H14 |
D31 |
IO_L17N_T2U_N9_AD10N_52 |
Bank52 |
SLR1 |
GPIO_PP10(GPIO-TEST) |
GPIO20 |
| H16 |
F32 |
IO_L15P_T2L_N4_AD11P_52 |
Bank52 |
SLR1 |
PS_PWM_SYNCI |
GPIO10 |
| H17 |
E32 |
IO_L15N_T2L_N5_AD11N_52 |
Bank52 |
SLR1 |
PS_PWM_SYNCO |
GPIO9 |
| H19 |
C31 |
IO_L19P_T3L_N0_DBC_AD9P_52 |
Bank52 |
SLR1 |
SPI2_SDI |
GPIO8 |
| H20 |
C32 |
IO_L19N_T3L_N1_DBC_AD9N_52 |
Bank52 |
SLR1 |
SPI2_SDO |
GPIO7 |
| H22 |
H27 |
IO_L16P_T2U_N6_QBC_AD3P_53 |
Bank53 |
SLR1 |
SPI2_NCS |
GPIO6 |
| H23 |
G27 |
IO_L16N_T2U_N7_QBC_AD3N_53 |
Bank53 |
SLR1 |
SPI2_SCK |
GPIO5 |
| H25 |
H26 |
IO_L14P_T2L_N2_GC_53 |
Bank53 |
SLR1 |
PS_QEP0_S |
GPIO4 |
| H26 |
G26 |
IO_L14N_T2L_N3_GC_53 |
Bank53 |
SLR1 |
PS_ADC_TRIG_E |
GPIO3 |
| H28 |
G24 |
IO_L18P_T2U_N10_AD2P_53 |
Bank53 |
SLR1 |
CIR_RX |
GPIO2 |
| H29 |
F24 |
IO_L18N_T2U_N11_AD2N_53 |
Bank53 |
SLR1 |
CIR_TX |
GPIO1 |
| J2 |
D33 |
IO_L21P_T3L_N4_AD8P_51 |
Bank51 |
SLR1 |
- |
- |
| J3 |
C33 |
IO_L21N_T3L_N5_AD8N_51 |
Bank51 |
SLR1 |
- |
- |
| J5 |
A33 |
IO_L24P_T3U_N10_51 |
Bank51 |
SLR1 |
I2S0_BCLK |
- |
| J6 |
A34 |
IO_L24N_T3U_N11_51 |
Bank51 |
SLR1 |
I2S0_LRCK |
- |
| J8 |
B35 |
IO_L22P_T3U_N6_DBC_AD0P_51 |
Bank51 |
SLR1 |
- |
- |
| J9 |
B36 |
IO_L22N_T3U_N7_DBC_AD0N_51 |
Bank51 |
SLR1 |
- |
- |
| J11 |
B30 |
IO_L20P_T3L_N2_AD1P_52 |
Bank52 |
SLR1 |
- |
- |
| J12 |
B31 |
IO_L20N_T3L_N3_AD1N_52 |
Bank52 |
SLR1 |
- |
- |
| J14 |
C29 |
IO_L23P_T3U_N8_52 |
Bank52 |
SLR1 |
- |
- |
| J15 |
B29 |
IO_L23N_T3U_N9_52 |
Bank52 |
SLR1 |
- |
- |
| J17 |
A29 |
IO_L22P_T3U_N6_DBC_AD0P_52 |
Bank52 |
SLR1 |
- |
- |
| J18 |
A30 |
IO_L22N_T3U_N7_DBC_AD0N_52 |
Bank52 |
SLR1 |
- |
- |
| J20 |
D26 |
IO_L19P_T3L_N0_DBC_AD9P_53 |
Bank53 |
SLR1 |
UART2_TX |
- |
| J21 |
C27 |
IO_L19N_T3L_N1_DBC_AD9N_53 |
Bank53 |
SLR1 |
UART2_RX |
- |
| J23 |
D24 |
IO_L23P_T3U_N8_53 |
Bank53 |
SLR1 |
UART1_TX |
- |
| J24 |
D25 |
IO_L23N_T3U_N9_53 |
Bank53 |
SLR1 |
UART1_RX |
- |
| J26 |
C24 |
IO_L24P_T3U_N10_53 |
Bank53 |
SLR1 |
- |
- |
| J27 |
B24 |
IO_L24N_T3U_N11_53 |
Bank53 |
SLR1 |
- |
- |
| J29 |
B25 |
IO_L22P_T3U_N6_DBC_AD0P_53 |
Bank53 |
SLR1 |
- |
- |
| J30 |
A25 |
IO_L22N_T3U_N7_DBC_AD0N_53 |
Bank53 |
SLR1 |
- |
- |
| K1 |
D34 |
IO_L20P_T3L_N2_AD1P_51 |
Bank51 |
SLR1 |
TWI2_SDA(CODEC) |
- |
| K2 |
C34 |
IO_L20N_T3L_N3_AD1N_51 |
Bank51 |
SLR1 |
TWI2_SCK(CODEC) |
- |
| K4 |
B34 |
IO_L23P_T3U_N8_51 |
Bank51 |
SLR1 |
I2S0_SDIN |
- |
| K5 |
A35 |
IO_L23N_T3U_N9_51 |
Bank51 |
SLR1 |
I2S0_SDOUT |
- |
| K10 |
B32 |
IO_L21P_T3L_N4_AD8P_52 |
Bank52 |
SLR1 |
I2S0_MCLK |
- |
| K11 |
A32 |
IO_L21N_T3L_N5_AD8N_52 |
Bank52 |
SLR1 |
- |
- |
| K13 |
D28 |
IO_L24P_T3U_N10_52 |
Bank52 |
SLR1 |
SPK_OUT_N |
- |
| K14 |
C28 |
IO_L24N_T3U_N11_52 |
Bank52 |
SLR1 |
SPK_OUT_P |
- |
| K19 |
B27 |
IO_L20P_T3L_N2_AD1P_53 |
Bank53 |
SLR1 |
DMIC_DATA |
- |
| K20 |
A27 |
IO_L20N_T3L_N3_AD1N_53 |
Bank53 |
SLR1 |
DMIC_CLK |
- |
| K22 |
C26 |
IO_L21P_T3L_N4_AD8P_53 |
Bank53 |
SLR1 |
UART2_RTS(485_DE2) |
- |
| K23 |
B26 |
IO_L21N_T3L_N5_AD8N_53 |
Bank53 |
SLR1 |
UART1_RTS(485_DE1) |
- |
